Publications

You can also find my articles on my Google Scholar profile.

Journal Articles


3DGauCIM: Accelerating Static/Dynamic 3D Gaussian Splatting via Digital CIM for High Frame Rate Real-Time Edge Rendering

Published in ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025

Digital CIM acceleration for static and dynamic 3D Gaussian Splatting toward high frame rate real-time edge rendering.

Wei-Hsing Huang*, Cheng-Jhih Shih*, Jian-Wei Su, Samuel Wade Wang, Vaidehi Garg, Yuyao Kong, Jen-Chun Tien, Nealson Li, Arijit Raychowdhury, Meng-Fan Chang, Yingyan (Celine) Lin, and Shimeng Yu. (2025). "3DGauCIM: Accelerating Static/Dynamic 3D Gaussian Splatting via Digital CIM for High Frame Rate Real-Time Edge Rendering." ACM Transactions on Design Automation of Electronic Systems (TODAES). (*Co-first authors.)

Conference Papers


NeRArch-Sim: A Unified Simulator for Benchmarking and DSE of Neural Rendering Accelerators

To appear in International Symposium on Computer Architecture (ISCA), 2026

To appear at ISCA: NeRArch-Sim is a unified simulator for benchmarking and design space exploration of neural rendering accelerators.

Cheng-Jhih Shih, Chaojian Li, Chihao Yu, Hsuan-Chen Fang, Sixu Li, Wei-Po Hsin, Lexington Allen Whalen, Hyewon Suh, Greg Eisenhauer, Ling Liu, Yingyan (Celine) Lin. (2026). "NeRArch-Sim: A Unified Simulator for Benchmarking and DSE of Neural Rendering Accelerators." International Symposium on Computer Architecture (ISCA 2026), to appear.

Think Hard Only When Needed: A Hybrid Best-of-N and Beam Search for Efficient Test-Time Compute

Published in The 19th Conference of the European Chapter of the Association for Computational Linguistics (EACL), 2026

Hybrid Best-of-N and Beam Search for more efficient test-time compute.

Hyewon Suh, Chaojian Li, Cheng-Jhih Shih, Zheng Wang, Kejing Xia, Yonggan Fu, and Yingyan Celine Lin. (2026). "Think Hard Only When Needed: A Hybrid Best-of-N and Beam Search for Efficient Test-Time Compute." The 19th Conference of the European Chapter of the Association for Computational Linguistics (EACL).

A Heterogeneous Computing Framework for Accelerating Fully Homomorphic Encryption

Published in International Symposium on Mobile Internet Security (MobiSec), 2023

Integrated homomorphic encryption (HE) implementations on various platforms and adopted heterogeneous scheduling algorithms.

Shih, Cheng Jhih, Hung, S. H., Chen C. W., Perng, C. F., Kao. M. C., & Shih, C. S. (2023). "A Heterogeneous Computing Framework for Accelerating Fully Homomorphic Encryption." International Symposium on Mobile Internet Security (MobiSec).
Download Paper | Download Slides

Oil and Vinegar: Modern Parameters and Implementations

Published in IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2023

A multivariate post-quantum cryptography (PQC) signature scheme with modern implementations on various platforms.

Beullens, W., Chen, M. S., Hung, S. H., Kannwischer, M. J., Peng, B. Y., Shih, Cheng Jhih, & Yang, B. Y. (2023). "Oil and Vinegar: Modern Parameters and Implementations." IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), Vol. 2023 No. 3.
Download Paper | Download Slides

NTT Multiplication for NTT-unfriendly Rings: New Speed Records for Saber and NTRU on Cortex-M4 and AVX2

Published in IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2021

NTT multiplication for Saber and NTRU on Cortex-M4 and AVX2, achieving substantial speedup compared to previous methods.

Chung, C. M. M., Hwang, V., Kannwischer, M. J., Seiler, G., Shih, Cheng Jhih, & Yang, B. Y. (2021). "NTT Multiplication for NTT-unfriendly Rings: New Speed Records for Saber and NTRU on Cortex-M4 and AVX2." IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), Vol. 2021 No. 2.
Download Paper | Download Slides

Polynomial Multiplication in NTRU Prime: Comparison of Optimization Strategies on Cortex-M4

Published in IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2021

Goods trick NTT and mixed radix NTT for polynomial multiplication in NTRU Prime, implemented on Cortex-M4.

Alkim, E., Cheng, D. Y. L., Chung, C. M. M., Evkan, H., Huang, L. W. L., Hwang, V., Li, C. L. T., Niederhagen, R., Shih, Cheng Jhih, Wälde, J., & Yang, B. Y. (2021). "Polynomial Multiplication in NTRU Prime: Comparison of Optimization Strategies on Cortex-M4." IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), Vol. 2021 No. 1.
Download Paper | Download Slides